Working with the CMOS inverter approximate switching time equation. Attachments in Word.

The circuit shown in Figure B2 is of a CMOS inverter driving a capacitive load. VDD represents logic level "1" and zero volts logic level "0". M1 is an nMOS device and M2 is a pMOS device. (a) Calculate the approximate switching time that is obtained if the output is loaded by a capacitance, CL , of 0.2 pF due to interconnections and the inputs of other gates. (b) Explain what would happen to the switching time if the lateral dimensions of the circuit are reduced by a factor of two whilst the vertical dimensions and all other parameters of the transistors remain unaltered.

Testing BJT transistors.

How would I design a circuit to test BJT transistors?

Amplifier Transfer Function (Simple)

Why is 1nF a transitor internal resistance? Please show the appropriate small signal equivalents. Thanks!

Feedback Amplifier Analysis (solution is provided, looking for more conceptul help)

The solution to this problem is provided. I'm mainly just looking for clarification on some things. I don't understand why the 10k (Rs - it's not actually labeled Rs but it's the one in series with Vs) resistance is not being taken into account in parts (e) & (f) and then in part (i) a completely different Ri is being used to calculate Rif and then when they do Rin` they just add on the 10k Rs and put the other 10k in parallel with the previous Rin. How is this possible? I've always taken Rs into account before in all cases. Also (in general) when calculating the gain for just the basic amplifier, are there situation where resistors after the op-amp (ie. in parallel with Rl) would ever be... click for more

Feedback Amplifier Analysis (more :) ) - again solution provided, need conceptul help

Solution is provided (those in part (a) it says series-shunt which is incorrect, it should say shunt-series). Looking for conceptul explanations. In part (e) when the gain is being calculated, why is the 2k (Is resistance) not being included? how would i know when / when not to include it? Also, got vo/vo1 is this a universal way to calculate the gain of a BJT? (collector/emitter)? and why/how is it negative? For part (d), what is the process one uses to calculate I`f/I`o. Is it the same as for Vf/Vo? ie. take all the resistances in parallel with the voltage and if there is some in series, you divide all of them in parallel by all of them in parallel plus the ones in series? Explanatio... click for more