Problems with Clocks in Digital Circuits

Is/Are there any problem(s) that a digital circuit may have, if I put an inverter in the Clock's path? If so, can we avoid it (them)?

Setup time, Hold time, Clock-to-Q delay and metastability

What are Setup time, Hold time, Clock-to-Q delay and metastability problems

inverse z transform

using any method determine the inverse z transform for the following X(z)= (z^3-2*z)/((z-2) left sided sequence

Design a logic configuration.

How to design a logic configuration which will operate, on a bit-by-bit basis, and determine the correct comparison after n(=4) clock pulses. XILINX (programme) can be used to design such configuration. If any one can help me with this, I would be very grateful, Thank you in advance. --- (See attached file for full problem description)

How do I draw the state diagram and state table?

Hi, you recently solved my problem of the logic configuration. I just wanted to know that how would a moore model be developed from this design, and also the state diagram and state table? If you can, can you please give me a description of how you derived such design of the circuit. thank you.