Compute the physical address corresponding to a virtual address using the given page table.

Given the following page table for a process currently executing on a processor, Virtual page number | Valid bit | Frame number 0 | 1 | 4 1 | 1 | 7 2 | 0 | - 3 | 1 | 2 4 | 0 | - 5 | 1 | 0 What physical address (if any) would virtual address 1053 translate to? All numbers are decimal, everything is numbered starting from 0, and all addresses are memory byte addresses. The page size is 1024 bytes.

Give an equation and a circuit diagram for the combinational logic circuit represented by the given truth table.

Given below is a truth table for a combinational logic circuit with three inputs and one output. Write an equation and draw a circuit which implements the function represented by this table. A B C OUT 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 0

Show which routines the CPU is executing from time 0 to 100ns, for the given sequence of events.

Given the following sequence of events, show which routines the CPU is executing from time 0 to 100ns. Each handler routine with its interrupt request takes 20 ns to complete. Time Action 0 ns Start of main program 10ns IRQ4 20ns IRQ6 45ns IRQ1 60ns IRQ3

How many bytes of memory can be stored in the direct-mapped cache with the given configuration?

Suppose, a computer has 2^16 bytes of main memory. There is a direct-mapped cache of 1K lines with a line size of 4 bytes. How many total bytes of memory can be stored in the cache?

Find the boolean equation representing the attached circuit diagram, and minimize it using Karnaugh Maps technique.

For the attached circuit, determine the equation it implements. Then minimize the equation using a Karnaugh map, and draw a new circuit that implements the minimized equation?